Gen2 MOSFET Reliability
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Gen3 Schottky Diode Reliability
|Reliability Stress||Diode Voltage||Samples||# Samples ≥1500 Hours||Device Hours|
|Reliability Stress||Diode Voltage||Samples||Device Cycles|
Life Beyond JEDEC
The extremely demanding environments of high-power semiconductor applications require rigorous reliability testing well beyond typical JEDEC industrial requirements. SemiQ performs reliability qualification by exposing the products to various stress tests at voltages, temperatures, humidity and pressure greater than expected in the final customer application. These severe conditions are applied to the parts over a period of time. The objective is to precipitate failures in an accelerated manner compared to use conditions. Failures are analyzed for opportunities to improve the product design thus improving the reliability performance. SemiQ has accumulated reliability data on all products during product qualification and extended testing well beyond the standard 1000 hour qualification time to gain additional confidence. A brief description of reliability tests is outlined below.
- High Temperature Reverse Bias (HTRB) – JESD22 A108: High temperature reverse bias testing is performed to evaluate a device’s long term reliability operation at maximum rated temperature and maximum rated blocking voltages. Device failures can occur at the Schottky interface and the edge termination as a result of prolonged high electric field and temperature.
- High Temperature Gate Bias (HTGB) – JESD22 A108: The HTGB test biases gate or other oxides of the device samples. The devices are normally operated in a static mode at, or near, maximum-rated oxide breakdown voltage levels. Data is collected using maximum positive and negative gate voltages.
- High Humidity High Temperature Reverse Bias (H3TRB) – JESD22 A101: H3TRB testing is used to evaluate a package’s ability to operate in a high humidity environment. The conditions applied, 85% relative humidity, 85°C and 100V accelerate moisture penetration through the molding compound to expose moisture failure modes like internal corrosion, oxidation, and shorting.
- Unbiased Highly Accelerated Stress Test (uHAST) – JESD22 A118: UHAST testing is used to evaluate a package’s ability to resist moisture. This test is performed with no bias, high pressure (33 PSIA), temperature (131°C) and humidity (85% R.H.) for 96 hours to evaluate the device mechanically. The test highly accelerates the moisture penetration through the package molding material or at the interfaces.
- Temperature Cycling (TC) – JESD22 A104: Temperature cycling tests are performed to evaluate a device’s resistance to electrical or mechanical failure due to the difference in the thermal coefficients of expansion of the different materials in the device caused by changes in the environment. The test uses extreme changes in temperature, minimum of -55°C or -40°C to a maximum of 150°C, repeatedly for 1000 cycles to accelerate damage from thermo mechanical stresses between materials at the interface.
- Intermittent Operating Life (IOL) – MIL STD 750, Method 1037: Intermittent operating life tests are performed to evaluate a device’s resistance to thermo mechanical failures due to a device’s internal power dissipation. This is similar to temperature cycling with the change in temperature occurring because of the device’s self-heating from electrical operation. The device is switched on and off with enough current to produce a die temperature of 150°C during the on state. This is repeated for 3000 cycles.
- High Temperature Storage (HTS) – JESD22 A103: High temperature storage testing (175°C) is performed to evaluate a device’s resistance to storage conditions, usually the effect of time and temperature on unbiased parts in storage.
- Electrostatic Discharge (ESD) – JS-001, JS-002: Electrostatic Discharge evaluates the endurance of a semiconductor device to Human Body Model (HBM) or Charged Device Model (CDM) electrostatic discharges while the device is handled until mounting into electronic equipment. The typical failure mode is an increase in semiconductor pin current leakage due to junction spiking or oxide shorting.